This seminar address the key breakthrough technologies and Process Integration challenges at the 45 nm mode and beyond.
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Semiconductor Training:Process Integration for CMOS Nanoscale Technologies -- Seminar OutlineThe dazzling array of new technologies and materials available to the microelectronics industry are enabling a new generation of devices that are unprecedented in both their capability and their fabrication complexity. Each new material or technology presents a unique set of advantages and challenges. However, how these groundbreaking semiconductor technologies and microchip materials are integrated into a real world, high yielding process flow is seldom discussed. This seminar focuses on explaining the capabilities and shortfalls of each of these new materials and integrated circuit technologies and presents strategies on how they can be integrated into a coherent whole. Seminar Fee: $1,795.00What's included: a) three days of instruction Who is the seminar intended for?This course is intended for busy semiconductor professionals who require a thorough understanding of the state-of-the art semiconductor manufacturing and the Process Integration challenges presented at the 45 nm technology node. The course is targeted at chip designers from fabless and merchant suppliers, semiconductor manufacturing managers and engineers, equipment and material suppliers, as well as key decision makers in the semiconductor industry. Schedule:
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Few areas of semiconductor research have proven as fertile in recent years as Non-Volatile Memory (NVM). A plethora of new technologies has emerged, each one vying for the prize to be the high-speed, low power, non-volatile replacement for DRAM. Each of these exciting new technologies will be examined in turn, their relative merits and shortcomings presented, and the process integration challenges they pose discussed.
With all of the developments occurring in silicon processing, the dramatic changes that have occurred in packaging technology are often overlooked. However, recent developments in this field have resulted in a series of radical new approaches to packaging microchips that have a profound impact on device functionality and performance. Each of these new packaging technologies is examined in detail and the importance of each scheme assessed.
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Jerry Healey |
Jerry Healey has been a technical professional in the semiconductor industry for 19 years, 8 years of which were spent as a Device Engineer at Motorola Semiconductor. He was formerly an instructor for UC Berkeley Extension (College of Engineering), and more recently was employed as a Process Integration Engineer at the Advanced Technology Development Facility, where he worked on 45 nm node development.
He is a renowned lecturer in the field of Silicon Processing, and his areas of expertise include process integration, technology transfer of new processes from R&D into manufacturing, embedded non-volatile memory processing, and mixed signal devices. His audiences remember him for the breadth of his knowledge regarding semiconductor manufacturing, his engaging lecture style, and the insightful color graphics he uses to illustrate his lectures.
An award winning public speaker, Mr. Healey has taught numerous courses to thousands of practicing engineers and scientists over the past 10 years. He has also co-authored over 20 papers in the field of Silicon Processing, and is currently the president of Threshold Systems, a firm that provides consulting services and technical training seminars to the semiconductor industry.
“"Jerry Healey is a superb public speaker who has a knack for making complex technical subjects seem clear and understandable."” –- J. Blume, AMD
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Robert Simonton |
Robert Simonton is a world authority on the subject of Ion Implantation, Rapid Thermal Processing, and Front-End-Of-Line (FEOL) processing. He has been a technical professional in the semiconductor industry for nearly thirty years, and during that period he has held a range of high-level technical positions that have afforded him the opportunity to develop a global understanding of semiconductor processing issues.
For the past twenty years, Mr. Simonton has held a variety of senior engineering positions with a number of leading semiconductor process equipment companies (Eaton, Varian etc.) in the areas of advanced product development, strategic marketing and Director of Technologies.
Most recently, Mr. Simonton has lead Simonton Associates, a consulting firm that specializes in resolving high-level technical and managerial issues for leading semiconductor suppliers.
He has authored and co-authored over 40 technical papers and four book chapters on semiconductor process technology, and is a recipient of the SRC Outstanding Industrial Mentor Award.
A renowned lecturer in the field of silicon processing for many years, Mr. Simonton’s audiences remember him best for his technical depth, his broad industry experience, and his engaging, high-energy lecture style.
" “Mr. Simonton is a walking encyclopedia of information
regarding semiconductor processing issues. His knowledge is both
current and leading edge. I really enjoyed his talk immensely.”"
- T. Jamison, Intel
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Dr. Moshe Preil |
Moshe Preil is the Global Product Manager and Technical Director for Luminescent Technologies, a Silicon Valley startup company pioneering the development and implementation of Inverse Lithography Technology. ILT is a novel form of Resolution Enhancement Technology that will help extend optical lithography to the 32 nm node and beyond.
Prior to joining Luminescent he spent over 8 years at KLA-Tencor working in various lithography and yield management positions, including reticle inspection, overlay and CD metrology and control, yield enhancement consulting, and advanced lithography strategies. For the preceding 12 years he worked in various areas of optical lithography, doing both advanced development as well as production. In his previous position at Advanced Micro Devices he was involved in the early development of deep-UV technology. He has also been active in the Sematech lithography community, and was a member of the early 193 nm steering committee at Sematech.
A dramatic and engaging public speaker, Dr. Preil has taught numerous courses on the subject of optical lithography, has published extensively in this field, and is widely regarded as a gifted and inspiring instructor.
“Dr. Preil has a commanding knowledge of all aspects of photolithography and possesses the ability to convey his understanding to others. He clearly explained lithographic concepts that have troubled me for years. I was impressed” -- T. Roberts, IBM
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| Dr. Neil Henis |
Dr. Neil Henis has over 20 years experience in
semiconductor manufacturing, and in the consumer and automotive
electronics industries. During this period he has worked for Sematech,
Motorola, Freescale and other major semiconductor manufacturers.
He commands a wide range of expertise in the areas of semiconductor
device Physics, semiconductor manufacturing, systems integration,
compound semiconductors and advanced processes for sub 65 nm nodes.
More recently Dr. Henis has been involved with the resolution
of issues concerning device thermal management, reliability and
advanced packaging.
An experienced instructor, Dr. Henis has also developed and taught
numerous courses for engineers, scientists and support personnel
in introductory and advanced silicon processing, as well as semiconductor
device physics. He has also authored and coauthored over thirty
scientific papers on the topics of semiconductor processing, integration
and reliability
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