This is a one-day class that examines and explains the series of radical new technologies that are revolutionizing the world of microchip manufacturing.

Course Description:

Until very recently the world of IC fabrication was one in which change was rapid and evolutionary. Today a range of new technologies have appeared that have precipitated a paradigm shift in semiconductor manufacturing that is both disruptive and revolutionary. Indeed, the pace and capabilities of these new technologies has rendered more traditional semiconductor manufacturing techniques obsolete, and changed the face of silicon processing.

Technologies such as Stained Silicon, Ultra-shallow Junctions, Copper Metallization, Low-k dielectrics and Nickel Silicide are changing the face of silicon fabrication today. While technologies such as Atomic Layer Deposition, Silicon-on-Insulator (SOI), Hybrid Orientation Transistors, Hi-K dielectrics and metal gate electrodes promise to change the silicon fabrication processes of tomorrow.

Each of these new technologies represents a world unto itself with their own jargon, principles, characteristics and physical principles. Understanding what these new technologies do, and how they work can be a daunting task.

The purpose of this short course is to make sense of each new technology and to clearly explain the role that it plays in modern semiconductor manufacturing. Each new processing paradigm is deconstructed into its constituent components, its operating principles explained, and the specific role played by the technology in the silicon fabrication process is described in detail. Particular attention is paid to explaining how each technology acts as a key enabler for the 45 nm node and beyond.

The course is intended for Process Engineers, Product Engineers, Device Engineers, R& D Engineers, Failure Analysis Engineers, VLSI Design Engineers, Technicians, and others who have a requirement to become conversant with new and more advanced silicon processing technologies.

Course Topics:

• Atomic Layer Deposition
  • What ALD is and how it works
  • Applications: DRAM dielectrics, Hi-k gate dielectrics, barrier metal and seed depositions, metal gate deposition
  • Equipment types
  
  
• Strained Silicon
  • Biaxial versus uniaxial strain
  • Implementing strain in silicon
  • Strain induced performance improvement
    
    
• Hi-K Dielectrics
  • The motivation for Hi-k
  • Types of Hi-k dielectrics
  • Fermi level pinning
  
  
• Metal Gate Electrodes
  • Boron penetration
  • The promise and the problem of metal gates
  
  
• Cu/Low-k Dielectrics
  • Technology trends
  • Cu/Low-k integration challenges
  
  
• spin-on ultra low-k dielectrics
  • Silicon-On-Insulator
  • SOI architectures
  • Performance enhancements
  
  
• SOI integration issues
  • Nickel Silicide
  • Motivations for the transition to Nickel
  • NiSi integration challenges
  
  
• Ultra-Shallow Junctions (USJ)
  • Motivation and challenges
  • Ion implantation requirements
  • Impact on device performance
    

Cost: $595.00/Student

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