| This
one-day course examines leading-edge ion implantation and the associated
thermal processes that have enabled CMOS device scaling to 65nm
& 45nm nodes and beyond.
Course Description:
The objective of this course is to provide
a thorough, intermediate-level treatment of leading-edge ion implantation
processes and their associated thermal processes. The course content
is up to date (65nm & 45nm) and rich in technical detail. This
course is appropriate for professional development of process engineers,
applications engineers, device engineers, VLSI design engineers,
technical marketing engineers and managers, and process equipment
engineers and scientists who wish to bring their understanding of
advanced technology trends enabling the scaling of CMOS transistors
and isolation structures to 65nm & 45nm technology nodes. The
material is presented using intuitive visual illustrations linked
to relevant physics equations, supported by state-of-the-art 2D
& 3D graphics and numerous SEM and TEM photographs of real world,
leading-edge CMOS device structures. Key references are provided
for independent follow-up studies.
In the past several years, ion implantation and associated thermal
processes have dramatically evolved to accommodate the requirements
for scaling CMOS logic transistor scaling to 65nm & 45nm technology
nodes. This has resulted in significant changes to both ion implantation
and thermal processes and process equipment. The course lectures
comprehensively cover the key developments in ion implantation processing,
associated thermal processing, and integration strategies that enable
CMOS logic transistor scaling to 65nm & 45nm technology nodes.
The course identifies the unit process, process equipment and process
integration changes that have enabled this scaling. It will explain
how these new ion implantation and thermal processes enable the
desired device structures and electrical functions. The scope of
the course is front end of line (FEOL) process integration trends,
from starting wafer through transistor salicide contact formation.
The course is targeted at Process Engineers, Product Engineers,
Device Engineers, R& D Engineers, Failure Analysis Engineers,
VLSI Design Engineers, Technicians, and other individuals who have
a need to know more about state-of-the-art ion implantation and
Rapid Thermal Processing.
Course Topics:
|
Our
technology and marketing consulting services deliver unique value
to our clients because they are grounded in our extensive, hands-on
industry experience. 
